Asynchronous Circuit Design and Verification

Supported by grants from the National Science Foundation (NSF CAREER award MIP-9625014), Intel Corporation, the Semiconductor Research Corporation (SRC), and the State of Utah, Professor Myers and his graduate students developed the ATACS tool for the synthesis and verification of timed asynchronous circuits. ATACS was utilized during the Intel RAPPID project which resulted in a prototype VLSI chip that was 3 times faster while using only half the power of the comparable synchronous design. NSF Japan Program award INT-0087281 helped foster a collaboration between the PI and Professor Tomohiro Yoneda of the National Institute of Informatics in Tokyo which has resulted in over 30 publications to date.



  • Brandon Bachman (MS), Intel Corporation, Folsom, CA.
  • Wendy Belluomini (PhD), IBM Almaden, San Jose, CA.
  • Jeff Cuthbert (BS), Raytheon, Dallas, TX.
  • Hans Jacobson (PhD), IBM Yorktown, NY.
  • Sung-Tae Jung (PostDoc), Professor, Wonkwang University, Korea.
  • Kip Killpack (MS), Intel Corporation, Hillsboro, OR.
  • Christopher Krieger (MS), Intel Corporation, Fort Collins, CO.
  • Eric Mercer (PhD), Associate Professor, Brigham Young University, Provo, UT.
  • Curt Nelson (PhD), Professor, Walla Walla University, Walla Walla, WA.
  • John Perry (BS), JPMorgan, New York City, NY.
  • Eric Peskin (PhD), Center for Health Informatics and Bioinformatics, New York, NY.
  • Allen Sjogren (BS), Hart Scientific, Salt Lake City, UT.
  • Robert Thacker (PhD), IBM Austin, TX.
  • Yanyi Zhao (MS), Stryker, San Jose, CA.
  • Hao Zheng (PhD), Associate Professor, University of South Florida.



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